Advancing elements of the trapped-ion quantum-CCD computing architecture

Presenting Author: Susanna Todaro, National Institute of Standards and Technology, Boulder
Contributing Author(s): D. H. Slichter, V. B. Verma, R. P Mirin, S. W. Nam, D. J. Wineland, A. C. Wilson, D. Leibfried

Despite significant progress in trapped-ion quantum computation, scaling to increasingly large number of qubits remains a challenge. In one proposal, the 'quantum-CCD' architecture[1], ion qubits are transported between trapping zones dedicated to memory, readout, or gate operations. Here, we seek to address two aspects of the quantum-CCD: fast transport and trap-integrated readout. 1) In most prior quantum-CCD experiments, ion transport between zones has been performed adiabatically, which generally takes an order of magnitude more time than typical laser-driven gate operations. We report progress towards transport in a surface-electrode trap on a timescale comparable to gate operations. 2) Qubit readout is typically performed by imaging ion fluorescence on a high-quantum-efficiency sensor using high-NA objectives; however, these this approach does not scale easily to parallel ion readout across spatially separated trapping zones. One solution integrates multiple photon detectors into the trap electrodes as separate readout devices. With short detector-ion distances, these would see a large fraction of the photons emitted from an ion in a readout zone but be less sensitive to distant ions. We report results from a single trap-integrated superconducting nanowire single-photon detector (SNSPD), with about 70% internal quantum efficiency, used for ion readout. This research is supported by IARPA and the NIST Quantum Information Program. [1] Wineland, et al., J Res NIST 1998

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