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Development of a Silicon Physical Qubit and Single Logical Qubit Design

Malcolm Carroll, Sandia National Laboratories

(Session 1 : Thursday from 6:45-7:15)

Abstract. An overview will be given of both experimental and theoretical development of a single error corrected logical qubit using silicon based hardware. The physical qubit research centers on demonstrating a basic qubit fabricated in an accumulation mode silicon metal oxide semiconductor (MOS) structure. The experimental component of the logical qubit focuses on the classical-quantum circuit interface and its impact on error correction. The logical qubit effort includes both hardware development, such as cryogenic complementary metal oxide semiconductor (CMOS), and a theoretical component, which examines a quantum error correction circuit architecture. The theoretical analysis accounts for more realistic constraints suggested by the physical qubit research while providing insight and feed-back about choices of lay-out, transport and error code choice. We note that some insight drawn from constraints of working in a cryostat may be more generally useful to other quantum computing architectures using cryogenics. In summary, the goal of this combined engineering effort is to more completely understand the design of a single solid-state logical qubit and work towards development of the required silicon qubit hardware elements (e.g., single qubit and read-out) with which to build it.